Xpeedic Inc., USA

 

XPEEDIC: Suite of high speed SI Solutions

High Speed communication link designs are becoming ever more challenging. The fast pace development of semiconductor and IC technology combined with the ever increasing data rates have added to the challenge. Xpeedic’s High Speed SI solutions provide a fast and accurate way to model and simulate the discontinuities along the path and optimize channel performance.
 
SnPExpert – SnpExpert provides a quick way to understand the electrical characteristics of the passive interconnectors in a system by not only viewing the S-parameter in frequency domain but also examining them in time domain (TDR).

ChannelExpert – ChannelExpert provides a fast and accurate way to address the signal integrity issues arising from cascaded network of S-parameter blocks and TML models. It’s frequency domain cascading technology and 2D-RLCG full wave transmission line solver enables quick and accurate channel simulation.

ViaExpert – ViaExpert provides a fast and accurate way to simulate via structures for both pre-layout and post-layout scenarios. The built-in connector footprint database allow users to quickly assemble the via model with connector footprint, breakout region trace, for a given stackup.  

Xpeedic: ChannelExpert – Channel Exploration

ChannelExpert provides a fast, accurate and easy way to evaluate and analyze pre-layout or post-layout high speed channel with its built-in advanced circuit and EM solver technologies.

It is challenging for digital system designers to simulate a high-speed SERDES channels. There are many different simulation scenarios to cover ranging from pre-layout / post-layout, frequency-domain / time-domain / statistical analysis, compliance check, to TX / RX optimization. 

ChannelExpert offers many built-in channel templates to support pre-layout exploration. Parametric S-parameters and transmission line models are supported for easy channel exploration. For post-layout scenario, ChannelExpert can extract the desired channels with or without crosstalk from physical layout with transmission line and 3D via models automatically generated with inbuilt field solvers.

Key Features

  • Built-in 2D RLGC solver to model TML
  • Easy multiple channel creation by table with only one-click
  • Built-in template to quickly create single channel and multiple channel
  • Easy to import PCB file to create channel
  • Support full BP simulation for Traditional BP, Orthogonal Direct BP, Orthogonal Mid-Plane BP
  • Support generating high speed SERDES channels from a bunch of PCB files and perform crosstalk and insertion loss simulations
  • Support buffers with DFE, CTLE and FFE, automatically optimize the equalization coefficient based on channel characteristics
  • Built-in substrate and stackup databases to modeling TML
  • Parametric S-Parameter files and transmission line physical parameters for easy channel exploration
  • Add multiple interpolation and extrapolation algorithms for S-parameter based frequency domain and crosstalk analysis
  • Support COM (Channel operation margin) analysis
  • Seamlessly link to SnpExpert for S-parameter viewing and post-processing

Download ChannelExpert Brochure

Xpeedic: ViaExpert – Via Modeling and Simulation

ViaExpert provides a fast and accurate way to model and simulate vias. It allows designers at the pre-layout stage to quickly build via models and check the key signal integrity metrics such as insertion loss, return loss, and crosstalk. It also allows designer to perform post-layout simulation of vias and trace breakout.

To quickly build via models, ViaExpert provides multiple ways including built-in templates, direct layout file import and a combined flow which takes advantage of both the layout trace breakout and built-in templates. ViaExpert deploys two field solver technologies, Finite Element Method (FEM) solver, and the another a hybrid field solver. Both adopt distributed processing and multi-core parallelization, which adds another level of acceleration to model computation.

Key Features

  • Optimization mesh improves the simulation accuracy and speed
  • Fast 3D FEM and hybrid solver offers better capacity and speed compared to other tools in market
  • Support HPC, remote and local simulation under the management of XDPM (Xpeedic Distributed Processing Management) module to maximize high computing machine availability
  • Built-in connector footprint library, easy to build connector via model
  • Multiple ways to create Via models or import Cadence .brd, .mcm, .sip file
  • Support arbitrary Via array definition, move, duplicate, align top / bottom / left / right, distribute horizontally / vertically, undo and redo features in 2D footprint window
  • Easy to add Via tear drop and trace compensation
  • Easy to modify stackup, trace length, trace width, pad size and antipad size
  • Support arbitrary parameterized keepout definition, management and usage in 2D footprint window to explore the optimal antipad geometry, the keepout shape can be defined by the unite of lines / arcs or regular parameterized geometries
  • Optimize routing method and support to define trace by axis or segment
  • Auto port generation, simplifies EM analysis setup
  • 3D-View makes the model check easier
  • Support parametric and optimization sweep simulation
  • Support export models to third-party tools, such as HFSS or CST

Download ViaExpert Brochure

Xpeedic: SnpExpert – S Parameter Exploration

Xpeedic SnpExpert provides a quick way to understand the electrical characteristics of passive interconnectors in a system by viewing the S-parameter in frequency domain and examining the time domain reflectometry (TDR). One-click definition of differential pairs and victim / aggressor setup, together with the built-in NEXT, FEXT, PSXT, ILD, ICR, and ICN, allows user to quickly evaluate the crosstalk.

Key Features

  • One-click to define differential pairs and victim / aggressor pairs
  • Built-in compliance metrics, such as IEEE802.3, OIF CEI etc.
  • Built-in template plot for RF components
  • Built-in Thru-Only De-embedding (TOD)
  • Built-in Open-Short / Thru De-embedding (OTD) method for on-chip de-embedding
  • Built-in delay & skew calculator
  • Support multiple data curves gating with only one click and export S-parameter
  • Built-in RLGC solver for transmission lines
  • Multi-ways to extract Dk / Df from S-parameter file
  • Built-in passivity / causality / reciprocity / stability checker
  • Support to convert S-parameter to broad band spice or Hspice RFM model
  • Support S->RLGC, RLGC->S, S->W-element transformation
  • Support complex numbers for S-parameter
  • Support to combine multiple s4p files to one snp
  • Support for Touchstone 2.0
  • Support Python script to invoke most SnpExpert features, including S-parameter import, plot, add mark, TDR, TOD and so on
  • Easy to generate report in MS Word and PPT format

Download SnpExpert Brochure

Xpeedic: TmlExpert – Fast and Accurate TML Modeling and Simulation

TmlExpert is an application which is used to deal with TML modeling and simulation. It provides a fast and convenient method to create TML model, from simulation result check, such as insertion loss, return loss, crosstalk, also allows the designer to do the simulation and tracking processing for the post layout.

TmlExpert has three solver technologies including 2D RLGC, 2.5D MoM and 3D FEM to achieve the best accuracy and convenience and has various templates for transmission-line structures including hatched ground plane and fiber weave

Key Features

  • Fast FEM3D and 2D RLGC solver offers better capacity and speed
  • Optimal 3D mesh improves the simulation accuracy and speed
  • Support adaptive frequency sweep and multi-threading processing technology to achieve excellent performance speedup
  • Built-in multiple templates for easy transmission line electrical characteristic exploration, including Tabbed Routing template, Serpentine Routing template and traditional Transmission Line template
  • Auto port generation simplifies EM analysis setup
  • 3D-View makes the model check easier
  • Support export models to third-party tools, such as HFSS

Download TmlExpert Brochure

Xpeedic: CableExpert – Fast and Accurate Cable Modeling and Simulation

Cable assembly is a key building component in network systems. Accurate modeling of cables is becoming a necessity to achieve the desired signal integrity with multi-gigabit data rate. Twin axial cable used for SFP and QSFP interface in 10G / 40G / 100G Ethernet is such an example. Many parameters have significant impact on signal quality such as drain type and shielding pattern, to name a few. Engineers need a fast and accurate way to model and simulate the cable with high confidence in signal integrity.

CableExpert offers a quick way to build 3D models with its built-in templates

  • Various drain types including center drain and dual drain
  • Various twin shielding including longitudinal and wrapping
  • Auto port generation to simplify EM setup
  • Parametric sweep for easy what-if analysis

Key Features

  • Fast 2D FEM RLGC solver offers better capacity and speed compared to other tools in market for cable simulation
  • Support adaptive frequency sweep and multi-threading processing technology to achieve excellent performance speedup
  • Optimal 2D mesh improves the simulation accuracy and speed
  • Auto port generation simplifies EM analysis setup
  • Support parametric and optimization sweep simulation for Twin axial Cable, Twisted Cable, LVDS Cable, IEEE 1394, Differential Cable and USB type-C templates
  • Easy export CableExpert simulation project to HFSS for easy verification

Download CableExpert Brochure

Xpeedic: Heracles - Automated SI Signoff for High Speed Design

Heracles is the first SI signoff tool for high speed designs. It integrates a novel hybrid full-wave EM solver with the same accuracy order as the conventional 3D solver but at a much higher speed. The hybrid solver takes advantage of the layered nature of the PCB layout and adopts the idea of layer-by-layer decomposition to reduce the complexity of the problem and achieve the computation speed optimized for full board crosstalk scan. With automated SI signoff flow, we can achieve the complete full board crosstalk scan in a few hours as intended with using the tool, which significantly reduces the post-layout check time, allows layout optimization, and ensures the full board coverage.

Heracles enables SI engineers to scan the Via pin field and breakout region under connectors or BGA packages for impedance and crosstalk violation. Crosstalk metrics such as frequency domain integrated crosstalk noise (ICN) or time domain waveform TDT are derived from the S-parameter to quantify crosstalk.

Key Features

  • Built-in versatile EM solver engines with controllable accuracy and speed to achieve full board scan within a few hours, including FEM3D solver, Hybrid Solver and Pure Via Solver
  • Built-in high speed I/O compliance such as Ethernet, PCI Express, DDR, USB, SATA and SAS, where crosstalk poses great challenges for high speed PCB designers with the ever-increasing data rate
  • Provides two flexible ways to select crosstalk scan areas with potential SI issues, either by net matching rules defined in high speed I/O compliances or selected manually
  • Heracles XSE provides interactive interface to invoke ViaExpert to visualize, sweep and optimize crosstalk model, and export to HFSS for better correlation

Download Heracles Brochure